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PowerPC e600 : ウィキペディア英語版
PowerPC e600
The PowerPC e600 is a family of 32-bit Power Architecture microprocessor cores developed by Freescale for primary use in high performance system-on-a-chip (SoC) designs with speed ranging over 2 GHz, thus making them ideal for high performance routing and telecommunications applications. The e600 is the continuation of the highly successful PowerPC G4 design, aka PowerPC 7400.
The e600 is a superscalar out-of-order RISC core with 32/32 kB L1 data/instruction caches, a seven-stage, three-issue pipeline with load/store, system register, powerful branch prediction, integer unit, a double precision FPU and an enhanced 128-bit AltiVec unit with limited out-of-order execution. The core is designed to work in multiprocessing and multi core designs and can take large amounts of L2 caches on die.
The e600 core is not compatible with the new Power ISA specification but adheres to the earlier PowerPC specification and is completely backwards compatible with the PowerPC G4 cores from which it derives.
== CPUs ==

In 2004 Freescale renamed the G4 core e600 and changed focus from general CPUs to high end embedded SoC devices, and introduced a new naming scheme, MPC86xx. The 7448 was to be the last pure G4 and it formed the base of the new e600 core.

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
ウィキペディアで「PowerPC e600」の詳細全文を読む



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